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The Resource CMOS analog design using all-region MOSFET modeling, Márcio Cherem Schneider and Carlos Galup-Montoro

CMOS analog design using all-region MOSFET modeling, Márcio Cherem Schneider and Carlos Galup-Montoro

Creator
Contributor
Summary
Covering the essentials of analog circuit design, this book takes a unique design approach based on a MOSFET model valid for all operating regions, rather than the standard square-law model. Opening chapters focus on device modeling, integrated circuit technology, and layout, whilst later chapters go on to cover noise and mismatch, and analysis and design of the basic building blocks of analog circuits, such as current mirrors, voltage references, voltage amplifiers, and operational amplifiers. An introduction to continuous-time filters is also provided, as are the basic principles of sampled-data circuits, especially switched-capacitor circuits. The final chapter then reviews MOSFET models and describes techniques to extract design parameters. With numerous design examples and exercises also included, this is ideal for students taking analog CMOS design courses and also for circuit designers who need to shorten the design cycle
Language
eng
Work
Publication
Extent
1 online resource (xvii, 486 pages)
Contents
  • Cover
  • Half-title
  • Title
  • Copyright
  • Dedication
  • Contents
  • Preface
  • 1 Introduction to analog CMOS design
  • 1.1. Analog design
  • 1.1.1. The need for analog design
  • 1.1.2. Tradeoffs in analog design
  • 1.1.3. The importance of component modeling
  • 1.2. Bipolar and metal8211;oxide8211;semiconductor field-effect transistors
  • 1.2.1. p8211;n Junctions
  • 1.2.2. Bipolar junction transistors
  • 1.2.3. MOS field-effect transistors
  • 1.2.4. Important differences between BJTs and MOSFETs
  • 1.3. Analog bipolar and MOS integrated circuits
  • 1.3.1. Analysis and design of integrated circuits
  • 1.3.2. Design of common-emitter and common-source amplifiers
  • Problems
  • References
  • 2 Advanced MOS transistor modeling
  • 2.1 Fundamentals of the MOSFET model
  • 2.1.1 Electrons and holes in semiconductors
  • 2.1.2 The two-terminal MOS structure
  • 2.1.3 Accumulation, depletion, and inversion (for p-type substrates)
  • 2.1.4 The small-signal equivalent circuit of the two-terminal MOS (for p-type substrates)
  • 2.1.5 The three-terminal MOS structure and the unified charge-control model (UCCM)
  • 2.1.6 The pinch-off voltage
  • 2.1.7 The Pao8211;Sah exact I-V model
  • 2.1.8 A charge-sheet formula for the current
  • 2.1.9 A charge-control compact model
  • 2.1.10 Threshold voltage
  • 2.2 A design-oriented MOSFET model
  • 2.2.1 Forward and reverse components of the drain current
  • 2.2.2 Universal dc characteristics
  • 2.2.3 MOSFET operation in weak and strong inversion
  • 2.2.4 Small-signal transconductances
  • 2.3 Dynamic MOSFET models
  • 2.3.1 Stored charges
  • 2.3.2 Capacitive coefficients
  • 2.3.3 Capacitances of the extrinsic transistor
  • 2.3.4 A non-quasi-static small-signal model
  • 2.3.5 A quasi-static small-signal model
  • 2.3.6 The intrinsic transition frequency
  • 2.4 Shorthannel effects in MOSFETs
  • 2.4.1 Effective mobility
  • 2.4.2 Velocity saturation
  • 2.4.3 Channel-length modulation
  • 2.4.4 Drain-induced barrier lowering
  • 2.4.5 Output conductance in saturation
  • 2.4.6 Gate tunneling currents
  • 2.4.7 Bulk current
  • Appendices
  • A2.1 Semiconductor charges
  • A2.2 Drain- and source-associated inversion charges
  • A2.3 Summary of n-channel MOSFET equations: UCCM, current, charges, transconductances, and capacitances including short-channel effects
  • A2.4 An alternative low-frequency small-signal model of the MOSFET in saturation
  • Problems
  • References
  • 3 CMOS technology, components, and layout techniques
  • 3.1 An overview of CMOS technology
  • 3.1.1 Basic process steps in monolithic IC fabrication
  • 3.1.2 Generic deep-submicron CMOS process flow
  • 3.1.3 Main parameters in 350- 180- and 90-mm processes
  • 3.2 Devices in CMOS technology
  • 3.2.1 Resistors
  • 3.2.2 Capacitors
  • 3.2.3 Inductors
  • 3.2.4 Bipolar transistors
  • 3.3 Latchup
  • 3.4 Analog layout issues
  • 3.4.1 Optical lithography
  • 3.4.2 Mask layout and design rules
  • 3.4.3 MOSFET layout
  • Problems
  • References
  • 4 Temporal and spatial fluctuations in MOSFETs
  • 4.1 Types of noise
  • 4.1.1 Thermal noise
  • 4.1.2 Shot noise
  • 4.1.3 Flicker noise
  • 4.2. Modeling the drainurrent fluctuations in MOSFETs
  • 4.3 Thermal noise in MOSFETs
  • 4.3.1 Channel thermal noise
  • 4.3.2 Shorth-channel effects on channel thermal noise
  • 4.3.3 I
Isbn
9780511797941
Instance
Label
CMOS analog design using all-region MOSFET modeling
Title
CMOS analog design using all-region MOSFET modeling
Statement of responsibility
Márcio Cherem Schneider and Carlos Galup-Montoro
Creator
Contributor
Subject
Language
eng
Summary
Covering the essentials of analog circuit design, this book takes a unique design approach based on a MOSFET model valid for all operating regions, rather than the standard square-law model. Opening chapters focus on device modeling, integrated circuit technology, and layout, whilst later chapters go on to cover noise and mismatch, and analysis and design of the basic building blocks of analog circuits, such as current mirrors, voltage references, voltage amplifiers, and operational amplifiers. An introduction to continuous-time filters is also provided, as are the basic principles of sampled-data circuits, especially switched-capacitor circuits. The final chapter then reviews MOSFET models and describes techniques to extract design parameters. With numerous design examples and exercises also included, this is ideal for students taking analog CMOS design courses and also for circuit designers who need to shorten the design cycle
Member of
Cataloging source
CDX
Dewey number
621.3815
Illustrations
illustrations
Index
index present
LC call number
TK7874.654
LC item number
.S36 2010eb
Literary form
non fiction
Nature of contents
  • dictionaries
  • bibliography
Label
CMOS analog design using all-region MOSFET modeling, Márcio Cherem Schneider and Carlos Galup-Montoro
Publication
Bibliography note
Includes bibliographical references and index
http://library.link/vocab/branchCode
  • net
Carrier category
online resource
Carrier category code
cr
Carrier MARC source
rdacarrier
Content category
text
Content type code
txt
Content type MARC source
rdacontent
Contents
Cover -- Half-title -- Title -- Copyright -- Dedication -- Contents -- Preface -- 1 Introduction to analog CMOS design -- 1.1. Analog design -- 1.1.1. The need for analog design -- 1.1.2. Tradeoffs in analog design -- 1.1.3. The importance of component modeling -- 1.2. Bipolar and metal8211;oxide8211;semiconductor field-effect transistors -- 1.2.1. p8211;n Junctions -- 1.2.2. Bipolar junction transistors -- 1.2.3. MOS field-effect transistors -- 1.2.4. Important differences between BJTs and MOSFETs -- 1.3. Analog bipolar and MOS integrated circuits -- 1.3.1. Analysis and design of integrated circuits -- 1.3.2. Design of common-emitter and common-source amplifiers -- Problems -- References -- 2 Advanced MOS transistor modeling -- 2.1 Fundamentals of the MOSFET model -- 2.1.1 Electrons and holes in semiconductors -- 2.1.2 The two-terminal MOS structure -- 2.1.3 Accumulation, depletion, and inversion (for p-type substrates) -- 2.1.4 The small-signal equivalent circuit of the two-terminal MOS (for p-type substrates) -- 2.1.5 The three-terminal MOS structure and the unified charge-control model (UCCM) -- 2.1.6 The pinch-off voltage -- 2.1.7 The Pao8211;Sah exact I-V model -- 2.1.8 A charge-sheet formula for the current -- 2.1.9 A charge-control compact model -- 2.1.10 Threshold voltage -- 2.2 A design-oriented MOSFET model -- 2.2.1 Forward and reverse components of the drain current -- 2.2.2 Universal dc characteristics -- 2.2.3 MOSFET operation in weak and strong inversion -- 2.2.4 Small-signal transconductances -- 2.3 Dynamic MOSFET models -- 2.3.1 Stored charges -- 2.3.2 Capacitive coefficients -- 2.3.3 Capacitances of the extrinsic transistor -- 2.3.4 A non-quasi-static small-signal model -- 2.3.5 A quasi-static small-signal model -- 2.3.6 The intrinsic transition frequency -- 2.4 Shorthannel effects in MOSFETs -- 2.4.1 Effective mobility -- 2.4.2 Velocity saturation -- 2.4.3 Channel-length modulation -- 2.4.4 Drain-induced barrier lowering -- 2.4.5 Output conductance in saturation -- 2.4.6 Gate tunneling currents -- 2.4.7 Bulk current -- Appendices -- A2.1 Semiconductor charges -- A2.2 Drain- and source-associated inversion charges -- A2.3 Summary of n-channel MOSFET equations: UCCM, current, charges, transconductances, and capacitances including short-channel effects -- A2.4 An alternative low-frequency small-signal model of the MOSFET in saturation -- Problems -- References -- 3 CMOS technology, components, and layout techniques -- 3.1 An overview of CMOS technology -- 3.1.1 Basic process steps in monolithic IC fabrication -- 3.1.2 Generic deep-submicron CMOS process flow -- 3.1.3 Main parameters in 350- 180- and 90-mm processes -- 3.2 Devices in CMOS technology -- 3.2.1 Resistors -- 3.2.2 Capacitors -- 3.2.3 Inductors -- 3.2.4 Bipolar transistors -- 3.3 Latchup -- 3.4 Analog layout issues -- 3.4.1 Optical lithography -- 3.4.2 Mask layout and design rules -- 3.4.3 MOSFET layout -- Problems -- References -- 4 Temporal and spatial fluctuations in MOSFETs -- 4.1 Types of noise -- 4.1.1 Thermal noise -- 4.1.2 Shot noise -- 4.1.3 Flicker noise -- 4.2. Modeling the drainurrent fluctuations in MOSFETs -- 4.3 Thermal noise in MOSFETs -- 4.3.1 Channel thermal noise -- 4.3.2 Shorth-channel effects on channel thermal noise -- 4.3.3 I
Control code
ocn664682072
Dimensions
unknown
Extent
1 online resource (xvii, 486 pages)
Form of item
online
Isbn
9780511797941
Media category
computer
Media MARC source
rdamedia
Media type code
c
Other control number
9786612749117
Other physical details
illustrations
http://library.link/vocab/ext/overdrive/overdriveId
  • 274911
  • 77048e84-3da2-4e58-b6bc-61f3b5f2e1d4
http://library.link/vocab/recordID
.b24805580
Specific material designation
remote
System control number
  • (OCoLC)664682072
  • cbo0511795610
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